Marvell Debuts Next-Gen CXL Memory Expanders, Fueling AI Inference Performance

Chip design leader Marvell Technology has officially introduced the second generation of its Structera X series CXL memory expanders. The newly announced 3406 and 3506 models are squarely targeted at the booming AI inference market, aiming to address memory bottlenecks in data-intensive workloads.

Technical Specs: Six-Channel CXL 3.2 and Massive Capacity

A key highlight of the new product is its designation as the industry's first six-channel CXL 3.2 memory expander. This architectural advancement translates directly into a substantial leap in memory capacity.

  • Impressive Capacity Ceiling: A single memory expander controller can support up to 9TB of DDR4 memory. If opting for the newer DDR5 standard, the maximum capacity reaches 6TB.
  • Channel Advantage: The six-channel design, compared to previous four-channel offerings, theoretically provides higher memory bandwidth and improved concurrent access—critical for AI model inference that frequently accesses vast parameter sets.

Market Positioning and Product Roadmap

By explicitly targeting AI inference, Marvell demonstrates a precise read on market trends. As AI applications shift from training to large-scale deployment and inference, efficient, cost-effective, and scalable memory solutions are in high demand from data center and cloud providers.

CXL (Compute Express Link) interconnect technology enables high-speed connections between CPUs and external devices like memory and accelerators, facilitating memory pooling and expansion. Marvell's new product leverages the latest features of CXL 3.2 to flexibly provision large, economical memory resources to server systems. This allows for a significant boost in AI task processing per server without a complete CPU platform overhaul.

Marvell currently plans to provide engineering samples of the Structera X 3406 and 3506 to partners starting in the first quarter of 2027. While this indicates that related system integrations and end products may still be some time away, it undoubtedly charts a course for high-performance computing architecture in the coming years.